bcm1125h ? bcm1125h high-performance mips processor ? highly integrated single core processor running at 400 mhz - 800 mhz ? sb-1 mips64? cpu ? quad-issue in order pipeline; dual execute, dual memory pipes ? enhanced skew pipeline enables zero load-to-use penalty ? 32-kb instruction cache, 32-kb data cache ? advanced branch predictors ? fast, on-chip memory-coherent bus (zbbus) ? connects the cpu, l2 cache, memory controller and i/o bridges ? runs at half the cpu core clock; 256 bits wide ? on-chip l2 cache ? 256 kb, shared by cpu and i/o bridges ? four-way associative, ecc protected ? ways can be removed to provide fast on-chip ram ? ddr memory controller ? one channel with a 64-bit data bus plus ecc ? runs up to 200 mhz clock rate, 400 mbps data rate ? support for ddr sdram, sgram, and fcram ? high-speed packet interfaces ? two 10/100/1000 ethernet macs; 802.3 compliant ? option to configure macs into packet fifos to enable oc-48 data rates ? pci interface ? 32-bit, 33/66 mhz pci 2.2 ? host bridge or target device ? hypertransport? i/o interface ? complies with hypertransport standard for high-speed i/o fabric ? 600-mhz clock rate, 1.2 gbps data rate ? peak bandwidth of 19.2 gbps on 8-bit link ? supports double-ended fabrics (linking two bcm1125hs or bcm1125h to bcm1250, bcm1280, or bcm1480) ? integrated system i/o ? generic i/o for direct connect to boot rom, flash, fast peripherals/ asics ? smbus serial configuration interface ? pcmcia control interface ? two serial interfaces ? extensive, on-chip debug features ? 4w @ 400 mhz ? software-compatible with bcm1250, bcm1255, bcm1280, bcm1455, and bcm1480 ? support for leading operating systems including vxworks ? , linux ? , netbsd ? , ose ? , qnx ? and teja? np os ? multiple evaluation board platforms available with tools, firmware and software drivers ? industry-leading performance ? 2.5 dmips/mhz ? processing speed of up to 4.3 mpps* ? 128-gbps on-chip bus bandwidth, 25-gbps memory bandwidth, 30- gbps total i/o bandwidth ? low power dissipation starting at less than 4w @ 400 mhz ? high functional integration ? programming ease and flexibility based on mips64 isa ? scalable system architecture ? broad tools and system software support ? software-compatible with bcm1250, bcm1255, bcm1280, bcm1455, and bcm1480 *based on internal broadcom benchmark, using bcm112x for standard ipv4 l3 look-up/switching. features summary of benefits applications ? the bcm1125h's world-class performance, power efficiency and integration makes these processors ideal for a broad variety of systems including: ? networking: routers, switches ? control plane processing ? line cards ? broadband access: dslam, cmts, bras ? wireless base stations ? storage: raid controllers, nas controllers, hbas ? web/networking/caching appliances ? imaging: printers, copiers bcm1125h bcm5691 gigabit ethernet switch bcm5461 copper bcm5461s fiber flash ddr sdram gmii pci genbus example: gigabit ethernet control panel
overview ? phone: 949-450-8700 fax: 949-450-8710 e-mail: info@broadcom.com web: www.broadcom.com broadcom corporation 16215 alton parkway, p.o. box 57013 irvine, california 92619-7013 ? 2005 by broadcom corporation. all rights reserved. 1125h-pb03-r 05/11/06 broadcom ? , the pulse logo, connecting everything ? , and the connecting everything logo are among the trademarks of broadcom corporation and/or its affiliat es in the united states, certain other countries and/ or the eu. any other trademarks or trade names me ntioned are the property of their respective owners. bcm1125h block diagram broadcom?s bcm1125h product is a state-of-the-art processor solution targeted at the fast-growing networking, wireless communications, storage, server/networking appliance and imaging markets. bcm1125h processors offer industry-leading performance, high functional integration, and low power levels in a small package required by next- generation networking applications. the bcm1125h is software-compatib le with the dual-processors bcm1250, bcm1255, and bcm1280 as well as with the quad-core processors bcm1455 and bcm1480. all these processors and share development and modeling tools, firmware, and operating systems with the processor. the bcm1125h processors are intelligent systems on a chip consisting of a broadcom sb-1 high performance mips64 cpu, a shared 256-kb l2 cache, a ddr memory controller, and an integrated i/o. all major blocks of the processor are connected together via the zbbus, a high-speed, low-latency, split-transaction, memory-coherent bus. the bus implements the standard mesi protocol to ensure coherency between the cpu, l2 cache, i/o agents, and memory. two gigabit ethernet macs (10/100/1000) enable easy interfacing to lans. to enable higher data rates, or in cases where ethernet protocol processing is not required, each mac can be configured as an 8-bit packet fifo, or both can be combined into a 16-bit packet fifo. high- speed i/o is provided using a 66-mhz (rev 2.2) pci local bus and 8-bit wide hypertransport? (ht) interface. two serial ports are provided for wan connections at up to t3/oc-1 rates (55 mbps). to enable low-chip-count systems, the bcm1125h processors also include a configurable generic bus that allows glueless connection of a boot rom or flash memory and simple i/o peripherals. on-chip debugging, tracing, and performance monitoring functions assist both hardware and software designers in debugging and tuning the system. the system can be run in either big- or little-endian mode. the bcm1125h processors are manufactured in tsmc's 0.13- process, and are packaged in pin-compatible 31-mm bga packages. implementation of mips64 isa the sb-1 cpu core is a high-performance implementation of the standard mips64 instruction set architecture (isa), and incorporates the mips-3d and mips-mdmx application specific extensions (ases). the core supports a four-issue enhanced skew pipeline and can dispatch up to two memory and two alu (integer, floating point, mdmx or mips-3d) instructions per cycle. 10 /100 / 1000 mac 32-bit pci ht host bridge fifo data mover ddr memory controller 256k l2 cache sb_1 core sb_1 core debug/ bus trace serial interface serial interface dual smbus gpio/ interrupt/ pcmcia i/o bridge flash interface and generic i/o jtag dma pci/ht bridge 10 /100 / 1000 mac dma dma dma zbbus 1/2coreclock 256 bits 1gbps 8-25 gbps 55 mbps 55 mbps 2 x gmii / 16-bit fifo @ 2 gbps / @ 6 gbps 2gbps
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